Maxim-integrated MAXQ622 Manuel d'utilisateur télécharger pdf (Page 106)

MAXQ612/MAXQ622 User’s Guide

6-4 Maxim Integrated

6.1 Port Pin Register Descriptions

The following peripheral registers are used to control the general-purpose I/O and external interrupt features specific

to the MAXQ612/MAXQ622.

Bits 7:0: Port 0 Output. This register stores the data that is output on any of the pins of port 0 that have been defined

as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing

the data direction of any pins for this port (through register PD0) does not affect the value in this register.

Bits 7:0: Port 1 Output. This register stores the data that is output on any of the pins of port 1 that have been defined

as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing

the data direction of any pins for this port (through register PD0) does not affect the value in this register.

Bits 7:0: Port 2 Output. This register stores the data that is output on any of the pins of port 2 that have been defined

as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing

the data direction of any pins for this port (through register PD2) does not affect the value in this register.

PO1

Port 1 Output Register

M0[01h]

Bit # 7 6 5 4 3 2 1 0

Name PO1.7 PO1.6 PO1.5 PO1.4 PO1.3 PO1.2 PO1.1 PO1.0

Reset s s s s s s s s

Access rw rw rw rw rw rw rw rw

PO0

Port 0 Output Register

M0[00h]

Bit # 7 6 5 4 3 2 1 0

Name PO0.7 PO0.6 PO0.5 PO0.4 PO0.3 PO0.2 PO0.1 PO0.0

Reset s s s s s s s s

Access rw rw rw rw rw rw rw rw

PO2

Port 2 Output Register

M0[02h]

Bit # 7 6 5 4 3 2 1 0

Name PO2.7 PO2.6 PO2.5 PO2.4 PO2.3 PO2.2 PO2.1 PO2.0

Reset s s s s s s s s

Access rw rw rw rw rw rw rw rw

1 2 ... 101 102 103 104 105 106 107 108 109 110 111 ... 254 255

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Maxim-integrated MAXQ622 Manuel d'utilisateur Page 106