MAXQ612/MAXQ622 User’s Guide
6-8 Maxim Integrated
Bits 7:0: Input/Output Direction for Port 1. The bits in this register control the input/output direction for port pins P1.0
to P1.7. When PD1.n is set to 0, the corresponding port pin (P1.n) acts as an input with characteristics determined by
PO1.n. When PD1.n is set to 1, the port pin acts as an output, driving the output state given by PO1.n.
Bits 7:0: Input/Output Direction for Port 2. The bits in this register control the input/output direction for port pins P2.0
to P2.7. When PD2.n is set to 0, the corresponding port pin (P2.n) acts as an input with characteristics determined by
PO2.n. When PD2.n is set to 1, the port pin acts as an output, driving the output state given by PO2.n.
Bits 7:0: Input/Output Direction for Port 3. The bits in this register control the input/output direction for port pins P3.0
to P3.7. When PD3.n is set to 0, the corresponding port pin (P3.n) acts as an input with characteristics determined by
PO3.n. When PD3.n is set to 1, the port pin acts as an output, driving the output state given by PO3.n.
Bits 5:0: Input/Output Direction for Port 4. The bits in this register control the input/output direction for port pins P4.0
to P4.5. When PD4.n is set to 0, the corresponding port pin (P4.n) acts as an input with characteristics determined by
PO4.n. When PD4.n is set to 1, the port pin acts as an output, driving the output state given by PO4.n.
Register Name
PD1
Register Description
Port 1 Direction Register
Register Address
M0[11h]
Register Name
PD2
Register Description
Port 2 Direction Register
Register Address
M0[12h]
Register Name
PD3
Register Description
Port 3 Direction Register
Register Address
M0[13h]
Bit # 7 6 5 4 3 2 1 0
Name PD1.7 PD1.6 PD1.5 PD1.4 PD1.3 PD1.2 PD1.1 PD1.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name PD2.7 PD2.6 PD2.5 PD2.4 PD2.3 PD2.2 PD2.1 PD2.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name PD3.7 PD3.6 PD3.5 PD3.4 PD3.3 PD3.2 PD3.1 PD3.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Register Name
PD4
Register Description
Port 4 Direction Register
Register Address
M1[10h]
Bit # 7 6 5 4 3 2 1 0
Name PD4.7 PD4.6 PD4.5 PD4.4 PD4.3 PD4.2 PD4.1 PD4.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
(93 pages)
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