
DS4830 User’s Guide
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6.2.1 – DAC Configuration Register (DACCFG)
Register Address: M4 [08h]
DACCFG7[1:0]
DACCFG6[1:0]
DACCFG5[1:0]
DACCFG4[1:0]
DAC Configuration: These bits configure DAC7-4 and select the DAC reference for
DAC7-4 when the corresponding DAC is enabled.
DACx Control/Reference Select
DACx is Disabled and is in power down mode.
DACx is enabled and REFINB is selected as the external reference
DACx is enabled and the 2.5V Internal Reference is selected as the
DAC reference
Reserved. (User should not write this value
+
)
PIN 39 is REFINB (Port1.4).
DACCFG3[1:0]
DACCFG2[1:0]
DACCFG1[1:0]
DACCFG0[1:0]
DAC Configuration: These bits configure DAC3-0 and select the DAC reference for
DAC3-0 when DAC enabled.
DACx Control/Reference Select
DACx is Disabled and is in power down mode.
DACx is enabled and REFINA is selected as the external reference
DACx is enabled and the 2.5V Internal Reference is selected as the
DAC reference
Reserved. (User should not write this value
+
)
PIN 31 is REFINA (Port2.6).
6.2.2 – DAC Data Registers (DACD0-DACD7)
DACD0 Register Address: M4 [00]
DACD1 Register Address: M4 [01]
DACD2 Register Address: M4 [02]
DACD3 Register Address: M4 [03]
DACD4 Register Address: M4 [04]
DACD5 Register Address: M4 [05]
DACD6 Register Address: M4 [06]
DACD7 Register Address: M4 [07]
Reserved. The user should write zero to these bits.
DACDx: These bits set the DACx output voltage according to reference selection and
reference value.
DACx Output voltage (in Volts) = (DAC Count / 4095) * Reference Voltage (in Volts)
* ‘x’ = 0 to 7
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