Maxim-integrated DS4830 Optical Microcontroller Manuel d'utilisateur Page 56
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DS4830 User’s Guide
56
7.2.6 – Temperature Control Register (TEMPCN)
Register Address: M2 [0Bh]
The Temperature Control register TEMPCN configures and enables internal die temperature and two external remote
diodes temperatures. Internal Temperature, external diode 0 and external diode 1 temperatures have dedicated data
buffers 22, 21 and 20 respectively. The DS4830 ADC Controller forces current in the diode and integrates voltage across
diode. After integration the ADC Controller measured voltage on ADC and convert measured voltage in temperature.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
-
-
-
-
-
INT_IEN
EX0_iEN
EX1_iEN
-
EX1_ALIGN
EX0_ALIGN
INT_ALIGN
-
EX1_TEMP
EX0_TEMP
INT_TEMP
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Access
r
r
r
r
r
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
BIT
NAME
DESCRIPTION
15:11
-
Reserved. The user should write 0 to these bits.
10
INT_IEN
Internal Temperature Interrupt Enable: Setting this bit to ‘1’ will enable an interrupt generation
on completion of an internal temperature conversion.
9
EX0_IEN
External Diode 0 Temperature Interrupt Enable: Setting this bit to ‘1’ will enable an interrupt
generation on completion of an external diode 0 temperature conversion.
8
EX1_IEN
External Diode 1 Temperature Interrupt Enable: Setting this bit to ‘1’ will enable an interrupt
generation on completion of an external diode 1 temperature conversion.
7
-
Reserved. The user should write 0 to this bit.
6
EX1_ALIGN
External Diode 1 Temperature Data Align. Setting this bit to ‘1’ configures external diode 1
temperature conversion data in left aligned mode. Setting this bit to ‘0’ configures external diode
1 temperature conversion data in right aligned mode.
5
EX0_ALIGN
External Diode 0 Temperature Data Align. Setting this bit to ‘1’ configures external diode 0
temperature conversion data in left aligned mode. Setting this bit to ‘0’ configures external diode
0 temperature conversion data in right aligned mode.
4
INT_ALIGN
Internal Temperature Data Align. Setting this bit to ‘1’ configures internal temperature
conversion data in left aligned mode. Setting this bit to ‘0’ configures internal temperature
conversion data in right aligned mode.
3
-
Reserved. The user should write 0 to this bit.
2
EX1_TEMP
External Diode 1 Temperature Enable. Setting this bit to ‘1’ initiates external diode 1
temperature conversion. The external diode 1 temperature typical conversion time is 4.1msec.
After external diode 1 temperature conversion result is available in data buffer 20.
1
EX0_TEMP
External Diode 0 Temperature Enable. Setting this bit to ‘1’ initiates external diode 0
temperature conversion. The external diode 0 temperature typical conversion time is 4.1msec.
After external diode 0 temperature conversion result is available in data buffer 21.
0
INT_TEMP
Internal Temperature Enable. Setting this bit to ‘1’ initiates internal temperature conversion.
The internal temperature typical conversion time is 4.1msec. After internal temperature
conversion result is available in data buffer 22.
7.2.7 – External Temperature Slope Control Register (ETS)
Register Address: M1 [16h]
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
-
-
-
-
-
-
-
-
ETS.7
ETS.6
ETS.5
ETS.4
ETS.3
ETS.2
ETS.1
ETS.0
Reset
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
Access
r
r
r
r
r
r
r
r
rw
rw
rw
rw
rw
rw
rw
rw
The ETS register sets changes the slope of external temperature measurements to compensate for changes in diode
ideality factor. The DS4830 is factory calibrated to work with a diode connected 2N3904 NPN transistor.
- OpticalMicrocontroller 1
- User’sGuide 1
- Contents 2
- SECTION 1 – OVERVIEW 9
- DS4830 User’s Guide 10
- SECTION 2 – ARCHITECTURE 11
- 2.2 – Register Space 12
- 2.3 – Memory Types 13
- 2.5 – Data Alignment 20
- 2.6 – Reset Conditions 20
- 2.7 – Clock Generation 22
- SECTION 5 – INTERRUPTS 36
- 5.1 – Servicing Interrupts 37
- 6.1 – Detailed Description 42
- 6.3 – DAC Code Examples 45
- 7.1 – Detailed Description 46
- 7.3 – ADC Code Examples 58
- SECTION 8 – SAMPLE AND HOLD 60
- 9.1 – Detailed Description 68
- SECTION 10 – I 76
- SECTION 11 – I 89
- C-COMPATIBLE SLAVE INTERFACE 89
- 11.1 – Detailed Description 90
- 12.2 – SPI System Errors 101
- 12.3 – SPI Interrupts 102
- SECTION 13 – 3-WIRE 110
- Using PWMCN and PWMDATA 113
- Core Clock 120
- FrequencyClockPWM 123
- FrequencyFramePWM 123
- * = 01b 127
- MULTIPLIER 140
- SECTION 19 – WATCHDOG TIMER 146
- 20.1 – TAP Controller 150
- 20.2 – TAP State Control 151
- 20.3 – Communication via TAP 152
- 21.2 – Debug Mode 160
- 22.1 – Detailed Description 169
- 22.2 – Bootloader Operation 171
- 22.3 – Bootloader Commands 173
- SECTION 23 – PROGRAMMING 179
- SECTION 24 – INSTRUCTION SET 192
- SECTION 25 – UTILITY ROM 220
- 25.4 – Utility ROM Examples 227
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